// ---- Created with 3Dmigoto v1.2.35 on Tue Apr 26 22:30:56 2016

Buffer<uint4> rSortCounter : register(t0);
StructuredBuffer<rBufferMax> rBufferMax : register(t1);


// 3Dmigoto declarations
#define cmp -
Texture1D<float4> IniParams : register(t120);
Texture2D<float4> StereoParams : register(t125);


void main()
{
// Needs manual fix for instruction: 
// unknown dcl_: dcl_resource_structured t1, 4 
// Needs manual fix for instruction: 
// unknown dcl_: dcl_uav_structured u0, 4
// Needs manual fix for instruction: 
// unknown dcl_: dcl_uav_structured u1, 4
  float4 r0,r1,r2;
  uint4 bitmask, uiDest;
  float4 fDest;

// Needs manual fix for instruction: 
// unknown dcl_: dcl_thread_group 512, 1, 1
  r0.x = rSortCounter.Load(float4(0,0,0,0)).x;
  r0.x = (uint)r0.x << 1;
// Known bad code for instruction (needs manual fix):
ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r0.y, l(0), l(0), t1.xxxx
r0.y = rSortCounter[]..swiz;
  r0.x = min((uint)r0.x, (uint)r0.y);
  r0.x = max(128, (uint)r0.x);
  r0.y = (uint)r0.x >> 1;
  r0.z = 2;
  while (true) {
    r0.w = cmp((uint)r0.x < (uint)r0.z);
    if (r0.w != 0) break;
    r0.w = (uint)r0.z >> 1;
    r1.x = r0.w;
    while (true) {
      r1.y = cmp(0 >= (uint)r1.x);
      if (r1.y != 0) break;
      r1.y = vThreadIDInGroupFlattened.x;
      while (true) {
        r1.z = cmp((uint)r1.y >= (uint)r0.y);
        if (r1.z != 0) break;
        uiDest.z = (uint)r1.y / (uint)r1.x;
        r1.z = uiDest.z;
        r1.z = mad((int)r1.z, (int)r1.x, (int)r1.y);
        r1.w = (int)r1.x + (int)r1.z;
        r2.x = (int)r0.w & (int)r1.y;
        if (r2.x != 0) {
        // Known bad code for instruction (needs manual fix):
                ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.x, r1.z, l(0), u0.xxxx
        r2.x = rSortCounter[]..swiz;
        // Known bad code for instruction (needs manual fix):
                ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.y, r2.x, l(0), u1.xxxx
        r2.y = rSortCounter[]..swiz;
        // Known bad code for instruction (needs manual fix):
                ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.z, r1.w, l(0), u0.xxxx
        r2.z = rSortCounter[]..swiz;
        // Known bad code for instruction (needs manual fix):
                ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.w, r2.z, l(0), u1.xxxx
        r2.w = rSortCounter[]..swiz;
          r2.y = cmp(r2.w < r2.y);
          if (r2.y != 0) {
            [r1.z].0 = u0.x;
            [r1.w].0 = u0.x;
          }
        } else {
        // Known bad code for instruction (needs manual fix):
                ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.x, r1.z, l(0), u0.xxxx
        r2.x = rSortCounter[]..swiz;
        // Known bad code for instruction (needs manual fix):
                ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.x, r2.x, l(0), u1.xxxx
        r2.x = rSortCounter[]..swiz;
        // Known bad code for instruction (needs manual fix):
                ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.y, r1.w, l(0), u0.xxxx
        r2.y = rSortCounter[]..swiz;
        // Known bad code for instruction (needs manual fix):
                ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.y, r2.y, l(0), u1.xxxx
        r2.y = rSortCounter[]..swiz;
          r2.x = cmp(r2.x < r2.y);
          if (r2.x != 0) {
          // Known bad code for instruction (needs manual fix):
                    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.x, r1.z, l(0), u0.xxxx
          r2.x = rSortCounter[]..swiz;
          // Known bad code for instruction (needs manual fix):
                    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.y, r1.w, l(0), u0.xxxx
          r2.y = rSortCounter[]..swiz;
            [r1.z].0 = u0.x;
            [r1.w].0 = u0.x;
          }
        }
        r1.y = (int)r1.y + 512;
      }
      Unknown sync instruction;
      r1.x = (uint)r1.x >> 1;
    }
    r0.z = (uint)r0.z << 1;
  }
  return;
}

/*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Original ASM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
//
// Generated by Microsoft (R) HLSL Shader Compiler 9.30.9200.20546
//
//
// Buffer Definitions: 
//
// Resource bind info for rBufferMax
// {
//
//   uint $Element;                     // Offset:    0 Size:     4
//
// }
//
// Resource bind info for rwSortingBuffer
// {
//
//   uint $Element;                     // Offset:    0 Size:     4
//
// }
//
// Resource bind info for rwViewZBuffer
// {
//
//   float $Element;                    // Offset:    0 Size:     4
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// rSortCounter                      texture   uint4         buf    0        1
// rBufferMax                        texture  struct         r/o    1        1
// rwSortingBuffer                       UAV  struct         r/w    0        1
// rwViewZBuffer                         UAV  struct         r/w    1        1
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_0
dcl_globalFlags refactoringAllowed
dcl_resource_buffer (uint,uint,uint,uint) t0
dcl_resource_structured t1, 4 
dcl_uav_structured u0, 4
dcl_uav_structured u1, 4
dcl_input vThreadIDInGroupFlattened
dcl_temps 3
dcl_thread_group 512, 1, 1
ld_indexable(buffer)(uint,uint,uint,uint) r0.x, l(0, 0, 0, 0), t0.xyzw
ishl r0.x, r0.x, l(1)
ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r0.y, l(0), l(0), t1.xxxx
umin r0.x, r0.y, r0.x
umax r0.x, r0.x, l(128)
ushr r0.y, r0.x, l(1)
mov r0.z, l(2)
loop 
  ult r0.w, r0.x, r0.z
  breakc_nz r0.w
  ushr r0.w, r0.z, l(1)
  mov r1.x, r0.w
  loop 
    uge r1.y, l(0), r1.x
    breakc_nz r1.y
    mov r1.y, vThreadIDInGroupFlattened.x
    loop 
      uge r1.z, r1.y, r0.y
      breakc_nz r1.z
      udiv r1.z, null, r1.y, r1.x
      imad r1.z, r1.z, r1.x, r1.y
      iadd r1.w, r1.x, r1.z
      and r2.x, r0.w, r1.y
      if_nz r2.x
        ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.x, r1.z, l(0), u0.xxxx
        ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.y, r2.x, l(0), u1.xxxx
        ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.z, r1.w, l(0), u0.xxxx
        ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.w, r2.z, l(0), u1.xxxx
        lt r2.y, r2.w, r2.y
        if_nz r2.y
          store_structured u0.x, r1.z, l(0), r2.z
          store_structured u0.x, r1.w, l(0), r2.x
        endif 
      else 
        ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.x, r1.z, l(0), u0.xxxx
        ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.x, r2.x, l(0), u1.xxxx
        ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.y, r1.w, l(0), u0.xxxx
        ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.y, r2.y, l(0), u1.xxxx
        lt r2.x, r2.x, r2.y
        if_nz r2.x
          ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.x, r1.z, l(0), u0.xxxx
          ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.y, r1.w, l(0), u0.xxxx
          store_structured u0.x, r1.z, l(0), r2.y
          store_structured u0.x, r1.w, l(0), r2.x
        endif 
      endif 
      iadd r1.y, r1.y, l(512)
    endloop 
    sync_uglobal_t
    ushr r1.x, r1.x, l(1)
  endloop 
  ishl r0.z, r0.z, l(1)
endloop 
ret 
// Approximately 54 instruction slots used

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/
